Open Source tool chain Verilog/VHDL to FPGA bin?

snickerdoodle general
1

Is there an Open Source tool chain to compile HDL to and directly flash to FPGA gates that runs on the board (like with the CAT-board RPi FPGA hat?) - or are proprietary closed-source Xilinx programs required (offboard?)

I’d like to develop a compiler for a custom language that translates to HDL and uses an OSS tool chain from there.

Thanks,
David

2
Unfortunately no

The HDL->bitstream architecture is heavily guarded by FPGA companies as key hardware intellectual property.
There are gratis toolchains available though that are heavily scriptable via TCL under x86 Linux.
The issue of open source tool chains on FPGAs has been exhaustively debated within the FPGA community.

The Lattice iCE40 internals were reversed engineered (well mostly). The iCE40 has a pretty simplistic/limited internal architecture http://www.clifford.at/icestorm/

Unfortunately while it is possible to reverse engineer the digital architecture it's highly unlikely that analog timing properties which are key for closing timing on any high performance FPGA design could ever be reliably reverse engineered but at low clock frequencies on small parts this probably does not matter.

There is also pretty heavy debate as to the legality of this type of reverse engineering especially since FPGAs nearly always integrate IP security mechanisms to prevent cloning. https://www.eff.org/issues/coders/reverse-engineering-faq

On Thursday, August 24, 2017 at 9:05:55 PM UTC-7, David Jung wrote:
Is there an Open Source tool chain to compile HDL to and directly flash to FPGA gates that runs on the board (like with the CAT-board RPi FPGA hat?) - or are proprietary closed-source Xilinx programs required (offboard?)

I'd like to develop a compiler for a custom language that translates to HDL and uses an OSS tool chain from there.

Thanks,
David