Yeah, guess I should have been clearer. My ideal use case when I was thinking of this was debugging the fpga from the ARM core, since I was under the impression the fpga was downstream of the processor on the jtag chain, meaning I could remotely access an OS running on the ARM processor over ssh, flash the fpga using the xdevcfg interface, and then debug from the OS using jtag. As such, kinda looks like the ICAPE2 core might be perfect, assuming its easy to work out use. The main hope was that this was already set up and had devoted connections so I didn’t have to mess with the AXI bus, but it sounds like it’s unlikely that’s the case. Ty for the help guys, sorry for nags. Still trying to figure out all the potential for this thing, because there’s a lot…
On Friday, June 2, 2017 at 7:36:43 PM UTC-4, weath...@krtkl.com wrote:
> It depends on what functionality you are looking for.
>
> If you are looking to Debug the ARM Cortex over JTAG then I believe that the registers that are used for that are also memory mapped as part of ARM CoreSight.
>
> On the other hand if you are looking to manipulate the FPGA configuration you may want to take a look at the ICAPE2 FPGA primitive see https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_1/ug953-vivado-7series-libraries.pdf pp. 291
>
> It really depends on your application.
>
> On Friday, June 2, 2017 at 3:34:16 PM UTC-7, hedg...@gmail.com wrote:
> Do you think that functionality is exposed and just poorly documented, or just not there? Usually xilinx is pretty good about this kind of thing, so i’d be surprised if the jtag chain wasnt exposed, but their documentation can be kinda painful so i also dont doubt its not well detailed how to use it anywhere.
>
> On Friday, June 2, 2017 at 5:08:47 PM UTC-4, Bush wrote:
> Unfortunately not. There is a mechanism (not yet realized in firmware/software) to access the JTAG from the STM32 but I am unaware of any way to access the FPGA from the Zynq ARM other than the xdevcfg interface.
>
> On Friday, June 2, 2017 at 1:59:26 PM UTC-7, hedg...@gmail.com wrote:
> Adding on to this in case it becomes necessary in the future:
>
> Is there a way to access the JTAG chain from the ARM processor, since its upstream of the FPGA? Is it also available in the xdevcfg directory structure?
>
> Thx for the help,
>
> hedge
>
> On Wednesday, May 24, 2017 at 2:43:53 PM UTC-4, hedg...@gmail.com wrote:
> Nice. Thanks!
>
> On Wednesday, May 24, 2017 at 2:28:28 PM UTC-4, Cousins wrote:
> You should be able to use “xdevcfg”
>
>
> $ cat bistream.bit > /dev/xdevcfg
>
>
> Check this out: http://www.wiki.xilinx.com/Programming+the+Programmable+Logic
>
>
> If a bitstream has been successfully loaded, the while status LED should have a “heartbeat.”
>
> On Wednesday, May 24, 2017 at 11:20:06 AM UTC-7, hedg...@gmail.com wrote:
> Hey guys,
>
>
> So, as of yet, is there any way to use the kernel running on the ARM processor on the zynq to reflash the fpga? or, alternatively, can the zynq processor access the fpga via jtag? iirc it is upstream in the chain, so the processor should have access to that, right?
> If so, any way to test or any PoC’s to mess around with? I’m used to flashing fpga bitstreams over jtag using xilinx’s applications, so this route is a bit new to me. Any help or thoughts would be appreciated.
>
>
> Thx,
>
>
> Hedgeberg