Howdy all,Given that the current iteration of the PiSmasher has a rather limited single bank of FPGA outputs available to the user, would it be possible to implement the ability make all of the pins used by the extra USB ports/ethernet ports/etc accessable via more external connectors, that way the extra peripherals (USB, ethernet ports, etc) can be disabled in the programmable logic and be repurposed for a different task?
Hi Sean, this is something we had attempted on earlier layouts but unfortunately it disturbs the high speed layout too much.
At the end of the day we had to make a compromise and given that the breakyBreaky is an option for users who just want tons of low level FPGA GPIO and that many competing solutions only provide a handful of free GPIO we concluded that for the piSmasher the most useful application compromise fell on the side of more high level I/O capability (GigE/USB/HDMI) which seems to be highly valued by the market and less free low level I/O (FPGA GPIO etc.)
I hope that clarifies the situation. We foresee that there will ultimately exist other baseboards designed by us and 3rd parties that re-balance the design/compromise equation.
I hope that clears up the design rationale,
-Jamil
On Wednesday, September 27, 2017 at 12:31:06 PM UTC-7, Sean Blakley wrote:Howdy all,Given that the current iteration of the PiSmasher has a rather limited single bank of FPGA outputs available to the user, would it be possible to implement the ability make all of the pins used by the extra USB ports/ethernet ports/etc accessable via more external connectors, that way the extra peripherals (USB, ethernet ports, etc) can be disabled in the programmable logic and be repurposed for a different task?
Alright, thanks, that does explain it. I appreciate the info. I see that there is one 40 pin connector on the PiSmasher, as well as a 14 pin connector. What are the functions of these connectors? Do they interface with programmable logic or with the processor subsystem? Are there GPIO pins available to the processor from these connectors?
On Wednesday, September 27, 2017 at 4:06:09 PM UTC-5, weath...@krtkl.com wrote:Hi Sean, this is something we had attempted on earlier layouts but unfortunately it disturbs the high speed layout too much.
At the end of the day we had to make a compromise and given that the breakyBreaky is an option for users who just want tons of low level FPGA GPIO and that many competing solutions only provide a handful of free GPIO we concluded that for the piSmasher the most useful application compromise fell on the side of more high level I/O capability (GigE/USB/HDMI) which seems to be highly valued by the market and less free low level I/O (FPGA GPIO etc.)
I hope that clarifies the situation. We foresee that there will ultimately exist other baseboards designed by us and 3rd parties that re-balance the design/compromise equation.
I hope that clears up the design rationale,
-Jamil
On Wednesday, September 27, 2017 at 12:31:06 PM UTC-7, Sean Blakley wrote:Howdy all,Given that the current iteration of the PiSmasher has a rather limited single bank of FPGA outputs available to the user, would it be possible to implement the ability make all of the pins used by the extra USB ports/ethernet ports/etc accessable via more external connectors, that way the extra peripherals (USB, ethernet ports, etc) can be disabled in the programmable logic and be repurposed for a different task?
Alright, thanks, that does explain it. I appreciate the info. I see that there is one 40 pin connector on the PiSmasher, as well as a 14 pin connector. What are the functions of these connectors? Do they interface with programmable logic or with the processor subsystem? Are there GPIO pins available to the processor from these connectors?
On Wednesday, September 27, 2017 at 4:06:09 PM UTC-5, weath...@krtkl.com wrote:Hi Sean, this is something we had attempted on earlier layouts but unfortunately it disturbs the high speed layout too much.
At the end of the day we had to make a compromise and given that the breakyBreaky is an option for users who just want tons of low level FPGA GPIO and that many competing solutions only provide a handful of free GPIO we concluded that for the piSmasher the most useful application compromise fell on the side of more high level I/O capability (GigE/USB/HDMI) which seems to be highly valued by the market and less free low level I/O (FPGA GPIO etc.)
I hope that clarifies the situation. We foresee that there will ultimately exist other baseboards designed by us and 3rd parties that re-balance the design/compromise equation.
I hope that clears up the design rationale,
-Jamil
On Wednesday, September 27, 2017 at 12:31:06 PM UTC-7, Sean Blakley wrote:Howdy all,Given that the current iteration of the PiSmasher has a rather limited single bank of FPGA outputs available to the user, would it be possible to implement the ability make all of the pins used by the extra USB ports/ethernet ports/etc accessable via more external connectors, that way the extra peripherals (USB, ethernet ports, etc) can be disabled in the programmable logic and be repurposed for a different task?
I am quite happy with the outcome of piSmasher. It's an all-in one that provides you everything you'd ever need. Of course the contrast to this is an already well defined project that calls for a more specialized board. Making the board even more complex is probably not a good idea.
By the way how many layers are you using on the piSmasher?
The 40 pins are connected to JC1 on the snickerdoodle black. The 14 pin connector (J4) is used for JTAG programming. There's also an 16 pin connector (J19) connected to the PS.
Am Freitag, 29. September 2017 16:19:15 UTC+2 schrieb Sean Blakley:Alright, thanks, that does explain it. I appreciate the info. I see that there is one 40 pin connector on the PiSmasher, as well as a 14 pin connector. What are the functions of these connectors? Do they interface with programmable logic or with the processor subsystem? Are there GPIO pins available to the processor from these connectors?
On Wednesday, September 27, 2017 at 4:06:09 PM UTC-5, weath...@krtkl.com wrote:Hi Sean, this is something we had attempted on earlier layouts but unfortunately it disturbs the high speed layout too much.
At the end of the day we had to make a compromise and given that the breakyBreaky is an option for users who just want tons of low level FPGA GPIO and that many competing solutions only provide a handful of free GPIO we concluded that for the piSmasher the most useful application compromise fell on the side of more high level I/O capability (GigE/USB/HDMI) which seems to be highly valued by the market and less free low level I/O (FPGA GPIO etc.)
I hope that clarifies the situation. We foresee that there will ultimately exist other baseboards designed by us and 3rd parties that re-balance the design/compromise equation.
I hope that clears up the design rationale,
-Jamil
On Wednesday, September 27, 2017 at 12:31:06 PM UTC-7, Sean Blakley wrote:Howdy all,Given that the current iteration of the PiSmasher has a rather limited single bank of FPGA outputs available to the user, would it be possible to implement the ability make all of the pins used by the extra USB ports/ethernet ports/etc accessable via more external connectors, that way the extra peripherals (USB, ethernet ports, etc) can be disabled in the programmable logic and be repurposed for a different task?
Markus.Markus’s comment spurred another question in my mind:
How will the functionality of the pismasher be affected by the Snickerdoodle black? I assume there will only be one variant of the pismasher, so will this variant provide extra pinouts in the presence of the Snickerdoodle black? What will the change in functionality be, if any?
Markus.Markus's comment spurred another question in my mind:How will the functionality of the pismasher be affected by the Snickerdoodle black? I assume there will only be one variant of the pismasher, so will this variant provide extra pinouts in the presence of the Snickerdoodle black? What will the change in functionality be, if any?
The 'extra' connector on snickerdoodle black (JC1) is tied to the expansion header on piSmasher. Functionality is otherwise the same.-Ryan
On Sunday, October 1, 2017 at 7:20:36 AM UTC-7, Sean Blakley wrote:Markus.Markus's comment spurred another question in my mind:How will the functionality of the pismasher be affected by the Snickerdoodle black? I assume there will only be one variant of the pismasher, so will this variant provide extra pinouts in the presence of the Snickerdoodle black? What will the change in functionality be, if any?
Hi Sean,
Here is what the layout currently looks like IRL.
It is getting some modifications at present to help with emissions which will put the USB on the lower edge up at the top edge and increase the width of the board in the short direction about 12mm.
JC1 is the connector in the top right hand corner.
-Jamil
On Thursday, October 5, 2017 at 10:22:03 AM UTC-7, Sean Blakley wrote:
Ok, I'm having a bit of trouble visualizing this. Has the PiSmasher layout changed since the last set of images ya'll posted? Are there any current images of the layout so that I can understand this a little better?
On Tuesday, October 3, 2017 at 1:52:50 AM UTC-5, Cousins wrote:The 'extra' connector on snickerdoodle black (JC1) is tied to the expansion header on piSmasher. Functionality is otherwise the same.-Ryan
On Sunday, October 1, 2017 at 7:20:36 AM UTC-7, Sean Blakley wrote:Markus.Markus's comment spurred another question in my mind:How will the functionality of the pismasher be affected by the Snickerdoodle black? I assume there will only be one variant of the pismasher, so will this variant provide extra pinouts in the presence of the Snickerdoodle black? What will the change in functionality be, if any?
Ok, thanks, that clears things up quite well. So, from what I have gathered, the extra pinout connector (JC1) will only have usable pins in the event that the PiSmasher is connected to the snickerdoodle black.