Hi there!
I looked a littel through this forum and think that I might not be the only one experiencing this issue. I couldn’t find a solution here or in the Xilinx forums however. Let me walk you through my problem:
My overall goal is to run freeRTOS on the snickerdoodle black PS and do some experiments with PL generated interrupts. Since Vitis (formerly Xilinx SDK) offers freeRTOS projects as examples there shouldn’t be too much work involved with this. However, the board for some reason does not boot from the SD card when I build the project and generate a boot.bin using bootgen. The same board works with the same card when using the prebuilt Linux.
For getting started purposes I am using a simple vivado blink example from ravvenlabs which works when I flash the bitstream via a prebuilt Linux (on the SD) to the PL. Hence, both, the SD card and the board are working fine and the prebuild Linux also boots from the SD card. To keep it as simple as possible I am for now trying to only run a hello world example on the baremetal board.
I enabled UART1 in the zynq and exported the hardware from Vivado to create a platform on Vitis from it, created an empty application, built the project and created a SD card boot image using the bootgen GUI for this purpose.
Here, I add the fsbl that is automatically created when creating the platform as well as the .bit file I know to work.
The generated boot.bin is copied to a SD card (the same that works for prebuilt Linux) but the board seems not to be able to boot it. I don’t read anything via UART and the bitstream also isn’t moved to the PL (no blinking LED).
What I have tried so far:
- Instead of a helloWorld application, include the freeRTOS Hello World example.
- Manually create a zynq_fsbl application and use it as the bootloader in the boot.bin generation process in stead of the automatically generated one
- Set debug flags in the fsbl (however still, nothing shows)
- Tried the examples from the krtkl git which however don’t build with newer versions of Vivado.
I pretty much did what I found in different tutorials and guides so I am a little baffled right now. Am I missing something? Any configurations in the Zynq PS?
I would be very thankful for any suggenstions!
PS: I also posted to the Xilinx forum here: https://forums.xilinx.com/t5/ACAP-and-SoC-Boot-and/Zynq-doesn-t-boot-from-Vitis-generated-boot-bin/td-p/1111766