Test PL reconfiguration using sysfs *.bin vs u-boot system.bit

Hello!

I don’t have JTAG and I would like to program the PL. I’m using the last ubuntu image for the snickerdoodle-one board and the last configuration available in the krtkl repo:

https://github.com/krtkl/snickerdoodle-board-files

 

To get a “hello world” test I was following Dr. Kaputa craftdrones’s nice tutorial for blinking a led in JA1.4 …

I tested the default u-boot method: copying system.bit to /boot and using sysfs, fpga_manager as mentioned by Ryan

http://krtkl.com/resources/forums/topic/xdevcfg/#post-19098

With the two methods I obtained the same unsuccessful result: heartbeat in white led (d4, APP) for an eternity

With sysfs I can read in /var/log/syslog
<code class=“bash”>fpga_manager fpga0: writing blinky.bit.bin to Xilinx Zynq FPGA Manager

With the serial connection over screen I can read that u-boot correctly detect the bitstream:
<code class=“bash”>

Executing script at 04000000

Loading bitstream from system.bit
reading system.bit
2083858 bytes read in 129 ms (15.4 MiB/s)
design filename = “blinker_design_wrapper;UserID=0XFFFFFFFF;Version=2018.1”
part number = “7z010clg400”
date = “2018/11/08”
time = “09:33:20”
bytes in bitstream = 2083740

Do you have a bitstream file (system.bit) available to test in my board?

Best,

Andres

Hello!

Reading another posts I realized that the white heartbeat is normal when the PL is programmed.

http://krtkl.com/resources/forums/topic/gpio-example-with-prime-le/#post-17057

With respect to test the bitstream load I was using Mike Ng guide in github as a test example

https://github.com/mng2/snickerdoodle-hello-world

To make it run with my vivado installation (v2018.1) I commented out two lines in the tcl file “regen.tcl”

# set_property -name "mem.enable_memory_map_generation" -value "1" -objects $obj # set_property -name "gen_full_bitstream" -value "0" -objects $obj

The bitstream is correcly loaded with u-boot and sysfs method :slight_smile:

To test all the gpios in JB1 at once (using a logic analyzer) I wrote a short python blink script that is more compact that the uitest.c example:

https://bitbucket.org/snippets/avejar/BeRyRa

maybe it can be useful to others.

Best,

Andres

Hi Andres,

Thank you for posting this and apologies for not getting you an answer earlier – we’ve been pretty overwhelmed over the past few weeks with getting more product out the door, scheduling new builds, closing out a few projects, etc. We will work on being more responsive going forward.

Glad you got it figured out!

-Ryan